26 to 28 of 28 SystemVerilog Jobs in the South East

latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into RTL micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power … integration teams Contributing to continuous improvement of engineering processes and design methodologies Skills & Experience Strong RTL design experience using Verilog and/or SystemVerilog Proven background developing complex FPGA and ASIC designs Experience optimising digital hardware for high-throughput signal or data processing Knowledge of synthesis, timing analysis, and power ...

An innovative technology company operating within the satellite communications sector is looking to add a Senior DDR Validation Engineer to its growing engineering team. Chroma are supporting the search to help meet increasing demand across ...

ASIC/SoC verification lifecycle, with real ownership of the verification of complex digital subsystems and mixed-signal ICs. Your work will include: Developing SystemVerilog/UVM verification environments Verification planning and test development Constrained-random and coverage-driven verification SVA/assertions Functional and code coverage RTL and testbench … senior levels What they're looking for You'll ideally have a background in ASIC, SoC or Digital IC Verification, with strong experience in: SystemVerilog | UVM | SVA | Constrained Random Verification | Functional Coverage | RTL Debug Experience with mixed-signal verification, formal verification, UPF/low-power verification, gate-level simulation ...