126 to 150 of 190 FPGA Jobs in London

Push Silicon to Its Limits – Founding FPGA Engineer (HFT) Top-tier HFTs are known for their technical rigour and stability, but often at the expense of autonomy and impact. What if you didn’t have to choose between the two? Despite launching only five years ago, this 35-person function already generates several billion in annual turnover. Fully backed by … makers globally, all built with their own proprietary stack. That independence hasn’t yet reached the hardware layer - this is where you come in. You’ll be the first FPGA specialist with a simple goal - own and transform the existing hardware systems designed by, and for, the parent company. Think high-performance platforms built around complex pipelines, low-latency data … them into something better, purpose-built and refined for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you More ❯

Push Silicon to Its Limits – Founding FPGA Engineer (HFT) Top-tier HFTs are known for their technical rigour and stability, but often at the expense of autonomy and impact. What if you didn’t have to choose between the two? Despite launching only five years ago, this 35-person function already generates several billion in annual turnover. Fully backed by … makers globally, all built with their own proprietary stack. That independence hasn’t yet reached the hardware layer - this is where you come in. You’ll be the first FPGA specialist with a simple goal - own and transform the existing hardware systems designed by, and for, the parent company. Think high-performance platforms built around complex pipelines, low-latency data … them into something better, purpose-built and refined for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you More ❯

C++ Developer - Low Latency, C++, FPGA, Linux, Market Data Systems, Order Entry Gateway Development, TCP/IP Protocols, Scripting Languages Role Overview: Join a high-performing low latency development team focusing on C++ components. The team specializes in delivering low-latency trading services using advanced technologies. Required Skills and Experience: Extensive C/C++ development experience Familiarity with financial markets More ❯

or Doctorate degree in Electrical Engineering. 9+ years of experience in space communications. Strong background in communication theory and deep understanding of RF concepts and impairments. Practical experience with FPGA and modern vector processing engines. Familiarity with satellite-communications standards (NR NTN, DVB-S2x, CCSDS). Proficiency in at least one scripting language (ideally Python) and one programming language (ideally More ❯

to learn more. Base pay range Direct message the job poster from SF Technology Solutions Proud Patrons of TechWM & Sponsors of Birmingham Tech Week Principle System Engineer with extensive FPGA (ideally using VHDL) and firmware design and development is sought on a hybrid basis by a multi award winning international engineering firm based near Gloucester. With over 15 years of … on more responsibility or an existing lead looking for more autonomy and flexibility. This Principle System Engineer based near Gloucester should have most of the following: Extensive experience with FPGA design using VHDL Automated VHDL testing experience Extensive de-bugging skills across software, firmware and hardware testing across hardware, software and FPGA domains end to end system design experience ideally More ❯

engineering, with a focus on signal processing Bachelor's degree in Electronics, Computer Science, Engineering, or a related field (Master's or PhD preferred) Expertise in digital design, FPGA development, PCB design, and/or analog/RF signal filtering Proven ability to lead complex projects and mentor junior engineers Benefits Competitive salary aligned with experience 25 days of More ❯

delivery, and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the machine level. Security testing of compute platforms (Server, PC More ❯

delivery, and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the machine level - Security testing of compute platforms (Server, PC More ❯

delivery, and 2 years in two or more of the following technical categories: Virtualization security (Xen, KVM, QEMU) - Hardware security (PCB, JTAG, UART, SPI, ROM, microcode, custom ASIC/FPGA) - x86 and/or ARM chipset and firmware security (TPM, UEFI, TrustZone, Secure Boot, JTAG, PCIe) - Physical security testing at the machine level Security testing of compute platforms (Server, PC More ❯

engineers and technicians Ability to consistently demonstrate decisive business impact and continuous drive for improvement in an ambiguous environment Strong communication skills and “right size” design documentation ASIC, Digital, FPGA, and/or SW experience is also a plus, though not required Estimated Salary Wage: $113,000 - $141,000 Annually What is in it for you? -A competitive salary and More ❯

of the following as possible): Compute (Linux - O.S., Tuning, kernel bypass technologies, core dump analysis) Network (R&S, cut-through, Multicast, SDN, BGP, L1-L3, PCAP analysis) HW (Server, FPGA, GPU, DPU, Memory, over clocking, cooling, ASIC, Quantum, NUMA) DevOps (OpenShift, Kubernetes, DevOps, Programming [C Python/Rust], CI/CD) Time Sync (PTP, NTP, GPS, White Rabbit, SyncE) Wave More ❯

network you want to login/join with: Principle System Engineer Role A multi award-winning international engineering firm near Gloucester is seeking a Principle System Engineer with extensive FPGA (preferably VHDL) and firmware design experience for a hybrid working role. With over 15 years of R&D and innovation, this engineer will join an R&D team focused on … high level of technical autonomy. This position is suitable for a senior system engineer seeking more responsibility or a lead engineer desiring greater autonomy and flexibility. Key Requirements: Extensive FPGA design experience using VHDL Automated VHDL testing experience Strong debugging skills across software, firmware, and hardware Testing across hardware, software, and FPGA domains End-to-end system design experience, ideally More ❯

This role requires extensive expertise in memory management, threading, CPU caching, and Linux systems, with an emphasis on high-performance and low-latency coding. The candidate will interact with FPGA systems and work closely on optimizing and developing trading strategies. Develop, optimize, and maintain high-performance C++ code for ultra-low-latency trading systems. Work on strategy interaction with FPGA More ❯

both technical performance metrics and evolving business needs. Key Responsibilities: Network Architecture & Design: Lead the design and continual optimization of ultra-low latency network infrastructure (e.g. Layer 1 switching, FPGA-based solutions, multicast protocols). Product Ownership: Act as the voice of the business for the network infrastructure-managing the roadmap, prioritizing features and performance upgrades, and aligning with trading … e.g. MiFID II timestamping), and support disaster recovery and failover strategies. Skills & Tools: Technical: Deep expertise in networking (TCP/IP, BGP, multicast, PTP), ultra-low latency hardware (e.g. FPGA, Arista 7130), and network analytics. Programming/Scripting: Familiarity with Python, Bash, or Go for automation and performance tuning. Tooling: Corvil, SolarWinds, Wireshark, Chronos, or other network performance monitoring tools. More ❯

both technical performance metrics and evolving business needs. Key Responsibilities: Network Architecture & Design: Lead the design and continual optimization of ultra-low latency network infrastructure (e.g. Layer 1 switching, FPGA-based solutions, multicast protocols). Product Ownership: Act as the voice of the business for the network infrastructure—managing the roadmap, prioritizing features and performance upgrades, and aligning with trading … e.g. MiFID II timestamping), and support disaster recovery and failover strategies. Skills & Tools: Technical: Deep expertise in networking (TCP/IP, BGP, multicast, PTP), ultra-low latency hardware (e.g. FPGA, Arista 7130), and network analytics. Programming/Scripting: Familiarity with Python, Bash, or Go for automation and performance tuning. Tooling: Corvil, SolarWinds, Wireshark, Chronos, or other network performance monitoring tools. More ❯

re Particularly Interested In People With Experience In High dynamic range broadband radio receiver design Software Defined Radio and hybrid analogue/SDR systems DSP algorithms and devices (including FPGA-based solutions) Signal search and identification techniques Radio propagation, noise, and interference The Ideal Candidate Is confident in both analogue and DSP aspects of receiver design Has experience with Radio More ❯

and Summary We are looking for a C++ developer to join the low latency development team. The team provides industry-leading low-latency trading services for our clients, utilizing FPGA, C++, and Java technologies. The candidate will focus on C++ components. The ideal candidate: Is motivated by working in a high-performing team, Is flexible to change work streams as More ❯

We are looking for a C++ developer to be part of the low latency development team. The team provides industry leading low-latency trading services for our clients, utilizing FPGA, C++ and Java technologies. The candidate will be focusing on the C++ components. The ideal candidate: Is motivated by working in a high performing team, Is flexible to change of More ❯

proactive and ownership mindset. Strong verbal and written communication skills. Nice to have: Knowledge of trade flow protocols like FIX, BOE, OUCH/ITCH, PILLAR, SBE, OMEX. Experience with FPGA-based applications and L1 network design. Familiarity with various network switch architectures and vendors. If you’re ready to work in a high-paced, challenging environment where your expertise directly More ❯

proactive and ownership mindset. Strong verbal and written communication skills. Nice to have: Knowledge of trade flow protocols like FIX, BOE, OUCH/ITCH, PILLAR, SBE, OMEX. Experience with FPGA-based applications and L1 network design. Familiarity with various network switch architectures and vendors. If you’re ready to work in a high-paced, challenging environment where your expertise directly More ❯

familiar with the ASCOM protocol, or other astronomy-specific protocols. know about security best practices for remote machine management, including certificate management, intrusion detection, and device authentication. know about FPGA coding, integrated circuit architecture, or the implementation of IoT solutions. have developed with real-time operating systems (RTOS) for developing time-critical applications in embedded systems. If you don’t More ❯

real-world applications-from radar and sensing technologies to IoT devices and advanced communication systems. Projects span sectors such as defence, healthcare, and industrial innovation, blending embedded software, electronics, FPGA, cloud, and system-level engineering. As a Lead Software Engineer, your responsibilities will include: Line management and mentoring for 3-5 engineers, supporting career development, conducting performance reviews, and assisting More ❯

large, global organization. Engineers thrive at Tower while developing electronic trading infrastructure at a world class level. Our engineers solve challenging problems in the realms of low-latency programming, FPGA technology, hardware acceleration and machine learning. Our ongoing investment in top engineering talent and technology ensures our platform remains unmatched in terms of functionality, scalability and performance. At Tower, every More ❯

Summary Fantastic opportunity to join a brand-new FPGA team, reporting to the CTO at this tech-savvy algorithmic trading firm. This is a highly impactful role with significant ownership, contributing to the design and delivery of a multi-year roadmap of new projects. Working in a small, high-quality team with a broad remit, you will work on large … algorithmically complex designs that fully utilize high-capacity FPGAs, incorporating high-speed serial interfaces, external memory interfaces, and PCI Express. You will also plan, optimize, and implement FPGA architectures for efficient resource utilization and high throughput, balancing speed, area, and power consumption. This role is suited for an FPGA engineer with a deep understanding of hardware design principles; you should … requirements into efficient hardware architectures, always considering physical synthesis implications. Requirements Capable of thinking beyond RTL to design resource-efficient circuits Proficiency in Verilog or SystemVerilog Understanding of modern FPGA architectures, capabilities, and limitations Knowledge of high-speed serial interfaces such as Ethernet, USB 3.1, or Fibre Channel Nice to have Familiarity with Cocotb Experience in trading-related applications (preferred More ❯

Social network you want to login/join with: FPGA Quant Engineer – Chicago/London/Amsterdam, London col-narrow-left Client: Oxford Knight Location: London, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Reference: 719a33bf450d Job Views: 4 Posted: 02.06.2025 Expiry Date: 17.07.2025 col-wide Job Description: Summary ***This role is available in … London/Amsterdam*** The positive feel of a start-up with the benefits that come with a more established player, this leading quant firm is looking for exceptional C FPGA engineers to join an elite global team to design and build the next generation of hardware solutions. Collaborating with technologists and traders, you will provide hardware systems in areas such … and have a proven record of solving unstructured problems. ***All interviews can be fully remote.*** Requirements Minimum 4 years of professional experience Solid knowledge of building reliable, high performance FPGA hardware systems A mix of traditional RTL development + software skills Ability to perform in a fast-paced environment, where accuracy is crucial Bachelor’s degree (or higher) in Computer More ❯