London, England, United Kingdom Hybrid / WFH Options
Defence iQ
ensure successful project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and More ❯
London, England, United Kingdom Hybrid / WFH Options
Defenceiq
ensure successful project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and More ❯
CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and self More ❯
CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and self More ❯
feed learnings back into the ASIC. Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‐level sign‐off. Own RTL development (SystemVerilog/Verilog/VHDL) including synthesis, static‐timing closure, formal and constrained‐random verification. Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‐per‐watt targets. More ❯
feed learnings back into the ASIC. Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‐level sign‐off. Own RTL development (SystemVerilog/Verilog/VHDL) including synthesis, static‐timing closure, formal and constrained‐random verification. Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‐per‐watt targets. More ❯
Social network you want to login/join with: FPGA Design and Verification Engineer - 297, London col-narrow-left Client: Location: London, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Reference: d1296bd28263 Job Views More ❯
Top proprietary trading firm with a significant presence in London is seeking to hire an experienced FPGA Developer to join their engineering team. As an FPGA Developer embedded in a small team, you will be responsible for designing, developing, testing More ❯
Top proprietary trading firm with a significant presence in London is seeking to hire an experienced FPGA Developer to join their engineering team. As an FPGA Developer embedded in a small team, you will be responsible for designing, developing, testing More ❯
London, England, United Kingdom Hybrid / WFH Options
microTECH Global Limited
Position: ASIC Verification Engineer Location: Oxfordshire, UK Full time/Perm: Office based & hybrid working arrangement with the option to work from home on Monday and Fridays. About the Client: My client is one of the leading providers of high More ❯
Top proprietary trading firm with a significant presence in London is seeking to hire an experienced FPGA Developer to join their engineering team. As an FPGA Developer embedded in a small team, you will be responsible for designing, developing, testing More ❯
London, England, United Kingdom Hybrid / WFH Options
Enterprise Recruitment Ltd
This position is perfect for an FPGA Engineer focused on innovation. You will be ahead of industry trends, collaborating with leading semiconductor companies and top engineers on challenging projects. In this small company, there's no micromanagement just a focus More ❯
FPGA Engineers at this award-winning multi-strategy hedge fund are responsible for the research, design and implementation of FPGA solutions for their ultra-low-latency trading systems. Accelerating trading decisions close to theoretical limits and partnering with both technologists More ❯
in RTL design at IP or SoC level. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. You might also have: Understanding of verification requirements. Experience in GPU/CPU design and associated tools such as UVM or formal verification More ❯
solutions. Requirements Minimum 2 years' experience in the full ASIC or FPGA design lifecycle, including hardware architecture, RTL coding, simulation, verification, system integration, and testing. Experience working with Verilog, SystemVerilog, and either Python or C++. Strong knowledge of FPGA design flow or physical design. Ability to work in a Linux environment. Bachelor's degree in Computer Engineering, Computer Science, or More ❯
Berkeley Square - Talent Specialists in IT & Engineering
optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/DSP architectures. Proficiency in SystemVerilog, C, Python, or scripting languages. Seniority level Seniority level Mid-Senior level Employment type Employment type Full-time Job function Industries Semiconductor Manufacturing and Computers and Electronics Manufacturing Referrals increase More ❯
and will be hands-on with infrastructure projects across the EMEA region as well as globally. Requirements 3+ years' experience in RTL design and verification for FPGAs using Verilog, SystemVerilog or VHDL Experience in FPGA toolchains using Xilinx Vivado (preferred) or Intel Quartus Experience using Python within verification frameworks Experience of simulation environments, Modelsim/Questa preferred Knowledge of C++ More ❯
Berkeley Square - Talent Specialists in IT & Engineering
optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/DSP architectures. Proficiency in SystemVerilog, C, Python, or scripting languages. Seniority level Seniority level Mid-Senior level Employment type Employment type Full-time Job function Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at More ❯
Out in Science, Technology, Engineering, and Mathematics
About the Company: This is a quantitative trading and investment firm with a disciplined and systematic quantitative approach to identify factors that consistently generate alpha. These factors are then coupled with our proprietary ultra-low latency trading systems and robust More ❯
Join to apply for the Design Verification Engineer role at G-Research Join to apply for the Design Verification Engineer role at G-Research Get AI-powered advice on this job and more exclusive features. Do you want to tackle More ❯
London, England, United Kingdom Hybrid / WFH Options
microTECH Global LTD
process Document design work, specifications, and milestones clearly and consistently Support synthesis and physical design teams during integration and bring-up phases Verification Responsibilities Develop and maintain UVM/SystemVerilog testbenches for functional verification Write both directed and random tests to verify design correctness and improve coverage Run regressions and assist with debugging RTL and tracking issues Verify functionality at … functional results to validate design behavior Work closely with architects and RTL designers in an iterative development cycle Design Requirements 0–2 years of experience in RTL design using SystemVerilog or VHDL Solid foundation in digital logic design and computer architecture Exposure to or strong interest in GPU, AI accelerators, or vector processors Familiarity with RISC-V ISA is a … MS in Electrical Engineering, Computer Engineering, or a related discipline Verification Requirements 0–2 years of hands-on experience with hardware verification (academic or internship projects count) Familiar with SystemVerilog and basic UVM concepts Interest or exposure to functional coverage, assertions, and constrained-random testing Understanding of GPU/AI workloads or RISC-V architecture is a plus Experience using More ❯
Work within the FPGA development team to roll out new hardware to the trading community Interact with development teams to coordinate technology introduction Develop high performance FPGA systems in SystemVerilog and/or HLS Contribute to the development of productivity tooling that supports hardware development efforts Stay informed of industry hardware (including the latest System-on-Chip and System-in … a pragmatic approach to problem solving At least 3+ years of experience working as a FPGA development engineer in a team environment At least 3+ years of RTL experience (SystemVerilog/Verilog/VHDL) At least 2+ years of software development experience Quantitative appreciation of low-level hardware/software interaction Degree in Electrical Engineering or Computer Science (or related More ❯
