26 to 50 of 53 SystemVerilog Jobs in the UK

Job Description At Leonardo, we are excited to be recruiting for a skilled FPGA Engineer to work within a multi-disciplinary team for our Precision Guidance area. In this broad FPGA firmware engineering role, you ...

drive development across units, lead architectural investigations, and collaborate with verification, software, and imaging researchers to deliver robust hardware solutions. Ideal candidates have strong SystemVerilog/Verilog/VHDL skills, UNIX scripting experience, and prior leadership capabilities for senior roles. #J-18808-Ljbffr ...

drive development across units, lead architectural investigations, and collaborate with verification, software, and imaging researchers to deliver robust hardware solutions. Ideal candidates have strong SystemVerilog/Verilog/VHDL skills, UNIX scripting experience, and prior leadership capabilities for senior roles. #J-18808-Ljbffr ...

remote and occasional onsite support to VIP users in Arm offices across the world as and when required Required Skills & Experience: Experience of using SystemVerilog and UVM with sound understanding of object-oriented design, data structures and algorithms Experience of IP and SoC verification with deep knowledge of verification processes ...

algorithm modelling to RTL sign-off and silicon bring-up. You will collaborate with digital design, optics, and software teams, develop verification environments with SystemVerilog/UVM, constrained-random testing, and formal methods, and contribute to reusable verification methodologies while mentoring junior engineers. #J-18808-Ljbffr ...

stack is, in fact, in Java). However, once you are here, you will be exposed to a diverse tech stack including Python, TypeScript, SystemVerilog (for FPGAs), Raft, Kubernetes, DLT, Angular, and more. The Package Potential: A clear path to a permanent role after graduation. Compensation for permanent roles currently ...

compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus … consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability ...

Working for a leader in the Semi's industry, I am looking to recruit a high-level, Senior SOC Architect. This position can be based in Edinburgh or Cork. You will be tasked with the ...

Join us at Entrust. From our comprehensive portfolio of solutions to our flexible, global workplace, we empower careers, foster collaboration, and build solutions that help keep the world moving safely. Position Overview Provides technical leadership ...

GSPS input rates, continuous streaming data paths, deep pipelining, and robust hand-shaking in advanced CMOS nodes Develop and maintain comprehensive verification environments using SystemVerilog/UVM, including constrained-random testing, coverage closure, and regression automation Define and implement assertion-based verification strategies for control logic, data-path correctness … performance ASICs or SoCs Ownership of verification for at least one complex block or subsystem processing continuous real-time data streams Strong proficiency in SystemVerilog, assertions (SVA), and modern verification methodologies (e.g. UVM. CocoTB) Proven experience verifying designs operating in GHz-class clock domains, including CDC/RDC analysis Familiarity ...

General Summary Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP, and performing pre- and post-silicon verification to verify correctness and ensure performance and power ...

latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into RTL micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power … integration teams Contributing to continuous improvement of engineering processes and design methodologies Skills & Experience Strong RTL design experience using Verilog and/or SystemVerilog Proven background developing complex FPGA and ASIC designs Experience optimising digital hardware for high-throughput signal or data processing Knowledge of synthesis, timing analysis, and power ...

doing: Design, implement and verify custom FPGA IP modules, DSP pipelines and high-speed communications interfaces using VHDL or Verilog/SystemVerilog in AMD/Xilinx Vivado Lead SoC hardware/software co-design by configuring and integrating the Processing System (PS) and Programmable Logic (PL) on Zynq UltraScale+ devices … with Vivado Design Suite, IP Integrator and simulation workflows (e.g., ModelSim, Questa or Vivado Simulator) Solid HDL capability across VHDL, Verilog and/or SystemVerilog Demonstrable experience with Yocto (BitBake, recipe creation, layer management) or PetaLinux for building custom Linux distributions Strong C/C++ skills for Linux kernel-space ...

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot ...

senior level engineers. This award-winning Technology company seeks a Degree qualified FPGA Design Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful Digital FPGA Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting … Engineering or related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Experience writing timing constraints and ensuring these are met. Designing for low power. To find out more, please apply in confidence now. ...

senior level engineers. This award-winning Technology company seeks a Degree qualified FPGA Design Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful Digital FPGA Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting … Engineering or related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Experience writing timing constraints and ensuring these are met. Designing for low power. To find out more, please apply in confidence now. ...

United Kingdom is seeking a verification engineer with a strong background in SystemVerilog, UVM, and constrained random verification to verify digital hardware architectures and co-processors. You will develop strategies, tests, and environments for security features, and help evolve verification methodologies across projects. Ideal candidates hold a BSc/ ...

Location Harwell - Didcot, Didcot, OXF OX110GD, GBR Overview Building the space between proven and possible, MDA Space (TSX:MDA) is a trusted mission partner to the global space industry, a robotics, satellite systems and geointelligence ...

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead SystemVerilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs. Remote from EU position with 8+ years of related experience; strong debugging ...

Required skills and experience: Strong software skills Python preferred, other languages acceptable Understanding of digital hardware concepts Ability to read and debug RTL in SystemVerilog Familiarity with debugging waveforms Desirable skills and experience: Verification planning and execution from specification Building testbenches Functional modelling of hardware blocks Checker creation Whether … SystemC or another methodology SystemVerilog Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership ...

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive ...

Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open ...

Lead the creation and verification of reusable RTL components A well-established company is seeking an RTL Design Architect with strong expertise in verification and good management skills to join their Cambridge-based development team. ...

methodologies and introducing them into existing verification flows. Your Profile BSc., or MSc., degree in Electronics or Electrical Engineering. Strong hands-on experience with SystemVerilog for testbench development and verification. Proven expertise in UVM (Universal Verification Methodology), including component creation, sequences, drivers, monitors, and scoreboards. Solid understanding and practical … Constrained Random Verification techniques. Experience with Metrics‐Driven Verification, including functional coverage and verification planning. Ability to write SystemVerilog Assertions (SVA) for protocol and design checking. Demonstrated success in achieving Coverage Closure across functional and code coverage metrics. Experience analysing coverage results and refining test strategies to close gaps. Strong ...

work alongside experienced engineers, helping to develop robust verification environments while gaining exposure to production silicon and advanced verification methodologies. Responsibilities Develop and debug SystemVerilog/UVM testbenches. Create and execute verification plans, tests, and coverage. Debug simulation failures and support regression testing. Contribute to verification infrastructure and automation. Collaborate … quality silicon. Participate in code reviews and contribute to open-source projects. Requirements Essential 15 years' industry experience in Digital Design Verification. Experience with SystemVerilog and UVM. Understanding of verification methodologies and constrained-random verification. Experience writing testbenches and debugging RTL. Programming experience in Python and/or C. Familiarity ...