51 to 58 of 58 SystemVerilog Jobs in the UK

Design Verification Engineer All Levels - 2+ years Bristol OR Cambridge locations This is a superb opportunity to join one of the hottest names in the industry! A chance to build a technology that transforms the ...

Design Verification Engineer This is a superb opportunity to join one of the hottest names in the industry! A chance to build a technology that transforms the future of humanity. A chance to work on ...

Take the initiative in developing reusable RTL for implementing clever algorithms For this role, we are seeking an academically bright candidate, PhD-qualified in a numerate stem subject such as physics, maths, electronics, or electronics ...

source silicon Collaborate with global industry-leading partners Real opportunity to shape verification strategy and grow with the team What you will be doing SystemVerilog/UVM-based verification (block & SoC level) Verification of CPU, GPU, and complex SoC subsystems Debugging regressions and reviewing open-source contributions Driving coverage closure … successful tapeouts and full verification lifecycles What they are looking for Experience in digital design verification (Mid to Lead level depending on seniority) Strong SystemVerilog/UVM expertise Experience in CPU and/or GPU verification Strong C/Python scripting and Git/GitHub workflow experience Exposure to full ...

more balanced and rewarding lifestyle. Key Responsibilities Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs Create and maintain testbenches using SystemVerilog and UVM Write and debug test cases to validate functionality, performance, and corner cases Perform block-level and full-chip verification, including simulation, coverage analysis … practices Manage and debug gate-level simulations Qualifications 10+ years of experience in digital and/or mixed-signal design verification Strong proficiency in SystemVerilog, UVM, and industry-standard simulation tools Solid understanding of digital design fundamentals, RTL design, and ASIC development flows Experience with scripting languages such as Python ...

NoC Architect Baya Systems , Greater Cambridge, UK -or- elsewhere in the UK hybrid/remote Job Title: NoC Architect About the role: We are seeking a NoC Architect with prior research experience in Networks-on ...

A Senior Mixed Signal Verification Engineer will join an exciting Semiconductor Scale-up to undertake digital, mixed signal and analog verification related to high speed Serdes designs. You’ll bring 10+ years’ Verification experience, strong ...

What you’ll do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs … commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already ...