101 to 125 of 330 SystemVerilog Jobs in the UK excluding London

This job is brought to you by Jobs/Redefined, the UK's leading over-50s age inclusive jobs board. Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job Overview Qualcomm invents breakthrough More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

Firmware/FPGA Engineers - All levels (All UK Sites) Leonardo Basildon, England, United Kingdom Join or sign in to find your next job Join to apply for the Firmware/FPGA Engineers - All levels (All UK Sites) role at Leonardo More ❯

1 day ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Job ID 2024-13226 Date posted 13/01/2025 Location Manchester, United Kingdom Category Architecture Job Overview In More ❯

Job Overview: Arm's hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. Working as a team and collaborating with the world's leading technology companies, we More ❯

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and More ❯

performance, low power, and scalability. You will work closely with cross-functional teams including RF, firmware, verification, and architecture. Key Responsibilities Design and implement digital logic in Verilog/SystemVerilog for Wi-Fi MAC/PHY and related IP blocks Collaborate on micro-architecture definition and specifications Drive RTL design from concept through synthesis and verification to GDSII Work with … Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 5+ years of hands-on ASIC design experience Strong RTL design skills using Verilog or SystemVerilog Experience in SoC development and integration Familiarity with Wi-Fi, wireless MAC/PHY, or DSP-based systems is a plus Good scripting skills (Python, Perl, or TCL) Excellent communication More ❯

design and verification team which develops core units within the Network Adapter and BlueField SoC (System-on-Chip) silicon teams Use advanced verification methodologies like e/Specman and SystemVerilog/UVM to achieve verification closure Tests planning, tests and test environment development, build reference models, verify and simulate chip blocks/entities according to functional and performance specifications Work … innovate Ways to stand out from the crowd: Prior verification experience of DPUs, Network Adapters and/or high-speed interconnects Experience in e/Specman and/or SystemVerilog/UVM Background in Scripting (Python/Perl/shell) Knowledge of Ethernet and InfiniBand protocols Are you creative and autonomous? Do you love the challenge of crafting the highest More ❯

implementation, modelling, performance analysis and formal verification. Staff Engineers are also encouraged to mentor junior members Required Skills and Experience : Tried understanding of digital hardware design and Verilog/Systemverilog HDL Experienced in one or more of various verification methodologies - UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology … plans, test plans, testbench implementation, test case development, documentation, and support Experience with relevant coding languages: SystemVerilog, C++ and python Good Problem Solving and Debugging skills. "Nice To Have" Skills and Experience : Experience with ARM Architecture Knowledge of cache coherency protocol and AMBA protocols like CHI and AXI knowledge on scripting, automation In Return: The successful candidate will join a More ❯

Engineer, you would work with cutting-edge AI-capable FPGAs and help define the team's workflows. The ideal candidate will have experience with: Full FPGA development lifecycle Verilog, SystemVerilog, and VHDL C, C++, or Python Tools such as Quartus and Vivado RTL design optimization Linux development environments If you are interested in AI technology or seeking a new challenge More ❯

across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or More ❯

across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or More ❯

experience in technical leadership - all levels welcome Proven experience verifying large System on Chip (SoC) designs. Expertise in DSP, Wireless Communication, and networking standards. Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as csh, Tcl, Python, Perl, etc. More ❯

experience in technical leadership - all levels welcome Proven experience verifying large System on Chip (SoC) designs. Expertise in DSP, Wireless Communication, and networking standards. Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as csh, Tcl, Python, Perl, etc. More ❯

for innovation. Depending on your experience, you’ll bring some, or all, of the following: Experience in design techniques using VHDL Experience in verification techniques using either VHDL or SystemVerilog/UVM. Experience in specifying timing and area constraints for efficient FPGA place and route. Ability to analyze system-level requirements and derive detailed firmware requirements. Degree (BSc, BEng, MEng More ❯

the implementation approach and details of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of SystemVerilog and UVM Be able to develop new verification flows Have working knowledge of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work Experience More ❯

a passion for innovation. Depending on your experience, you'll bring some, or all, of the following: Experience in design techniques using VHDL Experience in verification techniques using eitherVHDLor SystemVerilog/UVM. Experience in specifying timing and area constraints forefficientFPGA place and route. Ability toanalysesystem level requirements and derive detailedfirmwarerequirements. Degree (BSc, BEng, MEng, MSc, PhD, EngD) in Electrical &Electronic More ❯

Synplify Pro Standards, Frameworks and Techniques Knowledge and experience of safety standards such as IEC 61513, IEC 62566, IEC26262, DO 254 UVM Constrained Random Testing Formal Verification Languages: VHDL, SystemVerilog, TCL, Python We're an equal opportunities employer. We're committed to developing a diverse workforce and an inclusive working environment. We believe that people from different backgrounds and cultures More ❯

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

Performance Objectives The successful candidate will participate in the following activities: Digital design using RTL coding, block and top-level verification, digital constraints, synthesis, ATPG, STA, etc. Expertise in SystemVerilog and RTL design and verification Coding skills in tcl/perl/Python and Verilog/SystemVerilog RTL Experience in maintaining design processes Added Value Knowledge of CMOS image sensors … and support remote design teams Leadership in process and quality improvements Requirements: Bachelor's/Master's in Electronics/Computing Fluency in English (written and spoken) Knowledge of SystemVerilog, digital circuit design (state machines, control logic, filters, memory interfaces), digital verification (randomized testing, code coverage, verification), UVM (a plus), logic synthesis, DFT, ATPG, STA skills (a plus), Linux, and More ❯

AI compute fabrics. Your work will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target functional correctness, low‐power modes … techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low‐power (UPF/CPF) methodologies. More ❯

Python. Knowledge of thermal and mechanical considerations in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Good experience in FPGA, SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team working environment in More ❯

loop testing Collaborate closely with trading and engineering teams to ensure robust, reliable systems Key Requirements: Strong experience in functional verification, including coverage models, reusable testbenches, and randomized testing (SystemVerilog, UVM, or cocotb) Proficient in Python and C++ in a Linux environment Comfortable with CI/CD workflows (Jenkins, GitLab CI, Bamboo, etc.) Understanding of networking protocols such as TCP More ❯