101 to 115 of 115 SystemVerilog Jobs in the UK excluding London

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

preferred, Remote considered) Contract : Contract | Outside IR35 Hourly Rate : Negotiable What You will Do: Develop verification plans for complex hardware designs Create and run SystemVerilog/UVM testbenches Support performance validation and debug issues Use formal verification techniques as needed Requirements: 5+ years of experience in hardware verification (preferably SoCs … Strong skills in SystemVerilog and UVM Familiarity with GPU , AI accelerators , or RISC-V (bonus) Experience with scripting languages (Python, Perl, TCL) Why Join? Work on cutting-edge GPU and AI projects Be part of an innovative and flexible team If you are interested, please send me your CV. Feel More ❯

with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯

with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯

with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯

in verifying the functionality and performance of our cutting-edge products. Responsibilities Develop and implement verification plans for complex ASIC designs Write and maintain SystemVerilog testbenches and test cases Create and execute UVM-based verification environments Collaborate with cross-functional teams to ensure design and verification goals are met Debug … Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering, or related field Solid understanding of ASIC verification methodologies and tools Proficiency in SystemVerilog and UVM Experience with verification of neuromorphic chips and AI accelerators is a plus Strong problem-solving and debugging skills You must have UK working More ❯

Senior FPGA Engineer £80-100k Slough Hybrid My client's innovative technologies have facilitated the deployment of high-speed internet and robust communication networks for remote and underserved areas, fostering digital inclusion and supporting the growth of smart cities More ❯

Senior FPGA Engineer | £80-100k | Slough | Hybrid My client's innovative technologies have facilitated the deployment of high-speed internet and robust communication networks for remote and underserved areas, fostering digital inclusion and supporting the growth of smart cities More ❯

strategies, you thrive on ensuring that designs comply with protocol standards and system requirements. You are experienced in creating and examining functional coverage, writing SystemVerilog assertions, and debugging RTL and gate-level simulation failures. Your background in firmware debugging and bug tracking using software tools like Jira sets you apart. … with sales, R&D, and other field AE teams to ensure customer and Synopsys goals are met. Creating and examining functional coverage and writing SystemVerilog assertions. Debugging RTL and gate-level simulation failures and firmware. Tracking bugs using software tools such as Jira and performing code coverage analysis. The Impact … the future of the verification team. What You'll Need: In-depth understanding of verification flows, test plans, and strategies. Expertise in constrained-random SystemVerilog testbenches using UVM or VMM. Experience in creating and examining functional coverage and writing SystemVerilog assertions. Skills in debugging RTL and gate-level simulation failures More ❯

Senior Digital Design Engineer Bristol – 3 days onsite £75,000 - £95,000 DOE An exciting opportunity has arisen for a Senior Digital Design engineer to make the next step in their career and join an industry leading company designing ASICs More ❯

higher for Staff level - IP Level/Unit Level verification experience is a must - Experience in designing verification environments for RTL designs - Experience with SystemVerilog and UVM - Understanding of end to end verification processes - UVM knowledge is a bonus - Understanding of computer architecture, such as pipelining, memory systems etc are … offer a fantastic referral scheme which I would be happy to discuss. Keywords: Semiconductors/Verification/CPU/RTL/IP Level/SystemVerilog/C++ #semiconductors #verification #cpu #rtl #ip #systemverilog By applying to this role you understand that we may collect your personal data and store and More ❯

higher for Staff level - IP Level/Unit Level verification experience is a must - Experience in designing verification environments for RTL designs - Experience with SystemVerilog and UVM - Understanding of end to end verification processes - UVM knowledge is a bonus - Understanding of computer architecture, such as pipelining, memory systems etc are … offer a fantastic referral scheme which I would be happy to discuss. Keywords: Semiconductors/Verification/CPU/RTL/IP Level/SystemVerilog/C++ #semiconductors #verification #cpu #rtl #ip #systemverilog By applying to this role you understand that we may collect your personal data and store and More ❯

higher for Staff level - IP Level/Unit Level verification experience is a must - Experience in designing verification environments for RTL designs - Experience with SystemVerilog and UVM - Understanding of end to end verification processes - UVM knowledge is a bonus - Understanding of computer architecture, such as pipelining, memory systems etc are … offer a fantastic referral scheme which I would be happy to discuss. Keywords: Semiconductors/Verification/CPU/RTL/IP Level/SystemVerilog/C++ #semiconductors #verification #cpu #rtl #ip #systemverilog By applying to this role you understand that we may collect your personal data and store and More ❯