126 to 150 of 329 SystemVerilog Jobs in the UK excluding London

Fi, SDIO/eMMC, MIPI CSI/DSI Experience of interconnect standards ACE, AXI, AHB, and APB Ability to form requirements and specify architectural features Expert-level Verilog/SystemVerilog for design and verification Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow Experience with ASIC/FPGA synthesis More ❯

DOORS, Siemens QuestaSim/ModelSim, Synopsys Synplify Pro, and knowledge of safety standards such as IEC 61513, IEC 62566, IEC 26262, DO-254, as well as languages like VHDL, SystemVerilog, TCL, Python. The package includes a competitive salary (dependent on experience), pension, life assurance, 25 days' holiday plus bank holidays, and opportunities for training and career development. Note: UK defence More ❯

Need From You We value technical expertise and passion for innovation. Depending on your experience, you should have: Experience in VHDL design techniques. Experience in verification using VHDL or SystemVerilog/UVM. Knowledge of timing and area constraints for FPGA design. Ability to analyze system requirements and derive detailed firmware specifications. Degree in Electrical & Electronic Engineering or similar. Security Clearance More ❯

regular mentoring, coaching, and feedback Skills, Knowledge & Expertise Essential Skills and Experience: Track record of building and leading high performing collaborative teams Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources for high throughput data or signal More ❯

imaging systems. The position is based in our Design Centre in Edinburgh, Scotland. JOB RESPONSIBILITIES: Define concepts for digital SoC architecture and blocks Create specifications Design and verify RTL (SystemVerilog/VHDL/FPGA) Collaborate closely with analog IC designers and subcontractors Experience with synthesis, timing closure, and STA is highly desirable Support DfT strategy and implementation Debug RTL and More ❯

Pro Standards, Frameworks and Techniques: Knowledge and experience of safety standards such as IEC 61513, IEC 62566, IEC 26262, DO-254 UVM Constrained Random Testing Formal Verification Languages: VHDL, SystemVerilog, TCL, Python The package: You'll receive a very competitive salary ( offered depends on level of experience) and other benefits including pension, life assurance and 25 days' (plus bank holidays More ❯

SOC-level verification Ability to determine verification requirements from the analysis of specifications Experience of debug and testing methodologies Experience with industry-standard verification methodologies and tools (UVM/SystemVerilog, Tools like VCS/Cadence/Questa) Experience in version control systems (e.g., Git/Mercurial/Perforce/Subversion) You might also have: A background in digital design Confident More ❯

Engineering or related. Additional Job Description: Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys. Be fluent in SystemVerilog, Verilog or VHDL and familiar with LINT, simulation and synthesis. Familiarity with architectures for secure systems design, e.g., cryptographic encoders/decoders or tagged processor architectures is a plus. Demonstrated More ❯

Join to apply for the Senior Firmware Engineer role at Fortescue 3 days ago Be among the first 25 applicants Join to apply for the Senior Firmware Engineer role at Fortescue Get AI-powered advice on this job and more More ❯

Job Description As a Digital Design Engineer, you will be responsible for the digital design and RTL coding using Verilog or System Verilog. Integrating modules at SoC and work hands-on in the development cycle, especially in frontend domain until More ❯

in every design you deliver. What You’ll Do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs, and coverage metrics Drive quality … level designs Core skills Strong commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already be living and working in More ❯

record in delivering 1st time success with complex mixed signal IC's. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability to interpret results and resolve More ❯

verification processes and methodologies Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field Solid understanding and hands-on experience with UVM and SystemVerilog Proficiency in scripting languages such as Perl, Python, or TCL Mid-Senior level As a Design Verification Engineer, the individual will spend their days collaborating with design and verification teams More ❯

have: •A degree in Electrical Engineering, Computer Engineering, or a related field •A basic understanding of digital design principles and computer architecture •Exposure to RTL design languages such as SystemVerilog or VHDL (through coursework, projects, or internships) •An interest in GPUs, AI accelerators, or RISC-V architecture •Some experience or enthusiasm for scripting (e.g., Python, TCL More ❯

have: •A degree in Electrical Engineering, Computer Engineering, or a related field •A basic understanding of digital design principles and computer architecture •Exposure to RTL design languages such as SystemVerilog or VHDL (through coursework, projects, or internships) •An interest in GPUs, AI accelerators, or RISC-V architecture •Some experience or enthusiasm for scripting (e.g., Python, TCL More ❯

of the most innovative imaging systems in development today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar for automation and testing Qualifications More ❯

threats like Improvised Explosive Devices (IEDs) in both military and civilian environments. Essential: UsingFPGAtechnologies especially from eitherXilinx,Microsemi(Actel) or Lattice and their tools Advanced verification techniques using eitherVHDLor SystemVerilog/UVM Specifying complex timing and area constraints for efficientFPGAplace and route Ability to analyse system level requirements and derive detailed Firmware requirements A methodical approach to the full firmware More ❯

involves designing and developing firmware, managing development activities throughout the project lifecycle, and delivering solutions. The candidate will provide technical guidance on FPGA design and verification techniques, including VHDL, SystemVerilog, and UVM. This position is primarily office-based, utilizing display screen equipment, with occasional work in labs and production environments. Depending on security requirements, remote work may be possible. The More ❯

performance. What We’re Looking For in a Design for Test (DFT) Engineer: Proven Expertise in DFT engineering, with a strong record of technical innovation. Technical Proficiency : Skilled in SystemVerilog RTL, TCL, Python, and Unix/Linux environments. Core DFT Competencies : Experience with hierarchical scan, memory BIST, JTAG/IJTAG, at-speed testing, ATPG, fault simulation, and silicon debug. Tools More ❯

of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading high performing collaborative teams. Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products. A strong skillset in delivery of digital designs for ASIC and FPGA. Optimisation of timing and hardware resources for high throughput data or signal More ❯

of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading high performing collaborative teams. Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products. A strong skillset in delivery of digital designs for ASIC and FPGA. Optimisation of timing and hardware resources for high throughput data or signal More ❯

and planning skills Motivated, self-starting, and collaborative Ability to troubleshoot complex issues across teams and languages Experience with verification in CPU and/or ASIC environments Knowledge of SystemVerilog, Python, C++, Linux, UVM, SVA, Assembly, LLVM, GCC, Git, SGE or other DRS Familiarity with XML, XPath/XSLT We offer a competitive salary, flexible working, generous leave, private medical More ❯

Required Skills and Experience: BSc, MSc or PhD degree qualification in Electronics/Computer Engineering or equivalent Ability to understand and use Hardware Description Languages (HDLs) such as Verilog, SystemVerilog or VHDL Strong interest in and understanding of CPU architectures and SoC design principles Experience in using RTL simulation tools for debugging purposes Ability to learn and communicate IP product More ❯

colleagues, clients, and suppliers • Ensure designs are developed according to relevant standards • Manage engineers • Conduct peer reviews Competences and Skills Essential • Full lifecycle of electronics design • VHDL, Verilog, or SystemVerilog • Simulators, synthesis and place & route tools and hardware debug • Verification methodologies • Scripting languages (e.g. Python) • Revision Control Systems (e.g. Git or Subversion) Flexible working You can work in the Southampton More ❯

collaborative person who actively shares feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C, C++ and Python. You have formal verification experience. What you can expect from us A comprehensive benefits package, including More ❯