26 to 44 of 44 SystemVerilog Jobs in the UK excluding London

projects. You’ll ideally have: 5-6+ years' experience in Digital IC Design or SoC Architecture Strong RTL design experience using Verilog or SystemVerilog Experience designing complex digital IP, SoCs or CPU subsystems Knowledge of on-chip interconnects such as AMBA/AXI A solid understanding of the complete ...

hackajob is partnering directly with Leonardo to hire for this role. Job Description: Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61,950/Principal: £53,300 to £71,400/ ...

compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus … consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability ...

validation, helping ensure high-quality, reliable products. In this role, you will: Design and develop firmware using Hardware Description Languages (VHDL, Verilog, or SystemVerilog) Lead or contribute to firmware architecture and design decisions Verify and validate firmware using simulation and testbench environments Work closely with systems, hardware, and software engineers … operate with a high level of autonomy. You'll bring: Strong experience developing firmware for FPGA-based systems Expertise in VHDL, Verilog, or SystemVerilog Experience with simulation and verification tools (e.g. ModelSim, QuestaSim) Solid understanding of digital design and hardware/software integration Ability to contribute to or lead design ...

Join us at Entrust. From our comprehensive portfolio of solutions to our flexible, global workplace, we empower careers, foster collaboration, and build solutions that help keep the world moving safely. Position Overview Provides technical leadership ...

synthesis and handoff, collaborating with architecture, verification, and physical design teams to solve complex silicon problems. The role targets senior engineers with expertise in SystemVerilog, RTL debugging, and timing closure, contributing to cutting-edge semiconductor solutions #J-18808-Ljbffr ...

latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into RTL micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power … integration teams Contributing to continuous improvement of engineering processes and design methodologies Skills & Experience Strong RTL design experience using Verilog and/or SystemVerilog Proven background developing complex FPGA and ASIC designs Experience optimising digital hardware for high-throughput signal or data processing Knowledge of synthesis, timing analysis, and power ...

senior level engineers. This award-winning Technology company seeks a Degree qualified FPGA Design Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful Digital FPGA Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting … Engineering or related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Experience writing timing constraints and ensuring these are met. Designing for low power. To find out more, please apply in confidence now. ...

senior level engineers. This award-winning Technology company seeks a Degree qualified FPGA Design Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful Digital FPGA Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting … Engineering or related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Experience writing timing constraints and ensuring these are met. Designing for low power. To find out more, please apply in confidence now. ...

requirements and safety mechanisms at IP, subsystem, and/or SoC level. Develop and maintain verification environments, testbenches, assertions, checkers, and coverage models using SystemVerilog/UVM and related verification technologies. Debug simulation failures, identify root causes, and collaborate with design engineers to resolve issues. Trace safety requirements to verification … experience in IP, subsystem, or SoC verification, with a Bachelor's or Master's degree in Electronics, Electrical, or Computer Engineering. Strong proficiency in SystemVerilog, Verilog, and C/C++. Experience with UVM or other industry-standard verification methodologies. Experience developing constrained-random verification environments and reusable verification components. Experience ...

develop critical simulation infrastructure, contributing directly to the success of the FPGA team. Key responsibilities include: Architect, develop, and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs. Define and execute comprehensive verification plans, including constrained‐random testing, functional coverage, and code coverage analysis. Collaborate with RTL design … robust verification strategies, and work collaboratively across design teams to ensure high‐quality outcomes. You’d be a great fit with: Strong proficiency in SystemVerilog and UVM for architecting advanced verification environments. Experience using Python for test automation and scripting. Demonstrated ability to lead requirements gathering and define verification plans ...

production maturity. Support product definition and architecture activities, including feasibility studies and the development of digital blocks for FPGA emulation. Complete RTL design in SystemVerilog to meet system and product requirements. Develop comprehensive block-level test benches to verify digital functionality. Create behavioural models and top-level test benches … understanding of best-practice digital design methodologies. Strong experience delivering fully synthesised digital designs through RTL and logic synthesis flows. Experience working with SystemVerilog and industry-standard digital EDA tools. Familiarity with design constraints and automated place-and-route flows. A strong understanding of production test requirements and digital test ...

early planning through sign-off. Contribute to the overall DPU verification architecture, planning, integration strategy and quality criteria. Architect reusable, scalable and high-performance SystemVerilog/UVM environments and verification IP. Define verification plans, coverage models, sign-off criteria and measurable quality goals for the owned verification scope. Identify technical … ensure that the DPU integrates successfully into complete systems. Required Skills and Experience: Strong knowledge of, and extensive hands-on coding experience with, SystemVerilog and UVM, including the architecture, implementation and review of complex verification environments. Hands-on verification experience in standard on-chip bus protocols such as AMBA ...

Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open ...

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive ...

Required skills and experience: Strong software skills Python preferred, other languages acceptable Understanding of digital hardware concepts Ability to read and debug RTL in SystemVerilog Familiarity with debugging waveforms Desirable skills and experience: Verification planning and execution from specification Building testbenches Functional modelling of hardware blocks Checker creation Whether … SystemC or another methodology SystemVerilog Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership ...

work alongside experienced engineers, helping to develop robust verification environments while gaining exposure to production silicon and advanced verification methodologies. Responsibilities Develop and debug SystemVerilog/UVM testbenches. Create and execute verification plans, tests, and coverage. Debug simulation failures and support regression testing. Contribute to verification infrastructure and automation. Collaborate … quality silicon. Participate in code reviews and contribute to open-source projects. Requirements Essential 15 years' industry experience in Digital Design Verification. Experience with SystemVerilog and UVM. Understanding of verification methodologies and constrained-random verification. Experience writing testbenches and debugging RTL. Programming experience in Python and/or C. Familiarity ...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‐generation computing experiences—from AI and data centers to PCs, gaming and embedded systems. Grounded in ...

Advanced Micro Devices is hiring a Lead GPU Formal Verification Engineer in Cambridge, United Kingdom. This role focuses on cutting-edge verification techniques for graphics IP design, requiring strong leadership and collaboration skills. The ideal ...