76 to 100 of 103 SystemVerilog Jobs in the UK excluding London

doing Designing and developing advanced mixed-signal and embedded solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded software in C/C++ for sensing, control and signal processing applications Supporting silicon bring-up, debugging and validation activities Working across hardware, firmware and system … Contributing to technology and product roadmaps What we're looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software development experience using C/C++ Good understanding of microcontrollers and embedded systems Experience with Python, MATLAB or similar engineering tools Strong ...

validation, and product release. Key Responsibilities: System Architecture: Lead FPGA subsystem architecture for complex data platforms. RTL & Verification: Design/verify digital RTL (SystemVerilog/Verilog) using AMD/Xilinx toolchains. Optimization: Maximize throughput, power efficiency, resource usage, and timing closure. Integration: Collaborate with ASIC, FW, and SW teams … automation and mentor mid/senior hardware engineers. What We Need: Proven full-lifecycle FPGA design experience (architecture to hardware bring-up). Strong SystemVerilog/Verilog skills with AMD/Xilinx toolchains (Vivado/Questa). Hands-on experience with high-speed interfaces (PCIe/DMA) and lab debugging ...

doing Designing and developing advanced mixed-signal and embedded solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded software in C/C++ for sensing, control and signal processing applications Supporting silicon bring-up, debugging and validation activities Working across hardware, firmware and system … Contributing to technology and product roadmaps What we're looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software development experience using C/C++ Good understanding of microcontrollers and embedded systems Experience with Python, MATLAB or similar xehkeey engineering tools ...

methodologies, high-quality deliverables and successful project outcomes. Key Responsibilities Develop and execute verification strategies for complex ASIC and FPGA designs. Create and maintain SystemVerilog/UVM verification environments, testbenches and coverage models. Debug RTL and verification issues, ensuring designs meet quality and performance requirements. Collaborate with design, FPGA … reviews. Essential Skills & Experience Degree in Electronic Engineering, Computer Engineering or a related discipline. Proven experience verifying ASIC and/or FPGA designs. Strong SystemVerilog and UVM expertise. Good understanding of RTL design and digital hardware development. Experience with coverage-driven and assertion-based verification techniques. Linux proficiency and scripting ...

validation, helping ensure high-quality, reliable products. In this role, you will: Design and develop firmware using Hardware Description Languages (VHDL, Verilog, or SystemVerilog) Lead or contribute to firmware architecture and design decisions Verify and validate firmware using simulation and testbench environments Work closely with systems, hardware, and software engineers … operate with a high level of autonomy. You'll bring: Strong experience developing firmware for FPGA-based systems Expertise in VHDL, Verilog, or SystemVerilog Experience with simulation and verification tools (e.g. ModelSim, QuestaSim) Solid understanding of digital design and hardware/software integration Ability to contribute to or lead design ...

cleanly into end-to-end robotics solutions. Key Responsibilities FPGA IP Design & Architecture Design, implement, and optimize high-performance soft IP in Verilog/SystemVerilog for robotics and industrial solutions Define and maintain low-level HAL/driver APIs that expose IP capabilities to embedded and host software Develop … Electrical/Electronic Engineering (EEE), Computer Engineering, Computer Science, or a related discipline Strong production experience in RTL design (Verilog and/or SystemVerilog) targeting FPGAs Hands-on experience with RTL verification and simulation (e.g. ModelSim/Questa, VCS, or equivalent) Proven ability to close timing and optimize resource utilization ...

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into ...

quality requirements prior to FPGA deployment and ASIC tape-out. Key Responsibilities Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. Execute directed and constrained-random verification. Analyse coverage and debug RTL and verification issues. Support … Degree in Electronic Engineering, Computer Engineering or a related discipline. At least 3 years experience verifying digital ASIC and/or FPGA designs. Strong SystemVerilog and UVM skills. Understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency and scripting skills (Python ...

Senior Embedded Software Engineer - Systems Team Cambridge, UK Cambridge, UK | Full-time or Part-time | Permanent (or Temporary) | Hybrid The salary range for this role is broad, as we are able to consider varying levels ...

engineering team, contributing to the core FPGA technology that powers a range of next-generation products. Responsibilities Design and develop reusable FPGA modules using SystemVerilog for deployment across multiple products. Perform RTL verification and support timing closure through constraints, analysis, and design optimisation. Write module specifications, review code and documentation … maintain high engineering standards. Collaborate with hardware, software, and mechanical engineers to deliver new products to market. Essential Experience Strong SystemVerilog FPGA design experience. RTL verification skills and familiarity with Python. Experience writing timing constraints and achieving timing closure. Desirable Experience Experience with cocotb for FPGA verification. Familiarity with Linux ...

Degree in Electronic Engineering, Computer Engineering, or a related discipline. At least 3 years' experience verifying digital ASIC and/or FPGA designs. Strong SystemVerilog and UVM experience. Good understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency with Python … Ability to collaborate effectively across multiple engineering teams. What You'll Be Doing: Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. Carry out directed and constrained-random verification. Analyse coverage and debug RTL and verification ...

develop critical simulation infrastructure, contributing directly to the success of the FPGA team. Key responsibilities include Architect, develop, and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs. Define and execute comprehensive verification plans, including constrained‐random testing, functional coverage, and code coverage analysis. Collaborate with RTL design … robust verification strategies, and work collaboratively across design teams to ensure high‐quality outcomes. You'd be a great fit with Strong proficiency in SystemVerilog and UVM for architecting advanced verification environments. Experience using Python for test automation and scripting. Demonstrated ability to lead requirements gathering and define verification plans ...

Senior GPU Hardware Design Engineer Job no: 502793 Work type: Experienced Professional Location: Cambridge UK, Kings Langley UK, Bristol UK Categories: Graphics The role This is a unique opportunity to leverage your silicon design skills ...

Job Title: Senior Digital Design Engineer Location: Cambridge, United Kingdom Job Type: Permanent Salary: 65K - 88K GBP per annum DOE Role Overview: Work at the forefront of open silicon and hardware security, contributing to next ...

delivering first-time success with complex mixed-signal ICs Metric-driven verification: planning, requirements extraction, directed & constrained-random verification, functional and code coverage analysis SystemVerilog, including SVA (SystemVerilog Assertions) Testbench design using verification frameworks such as UVM, OVM, e, or VMM Strong RTL/testbench debugging skills (including gate-level ...

early planning through sign-off. Contribute to the overall DPU verification architecture, planning, integration strategy and quality criteria. Architect reusable, scalable and high-performance SystemVerilog/UVM environments and verification IP. Define verification plans, coverage models, sign-off criteria and measurable quality goals for the owned verification scope. Identify technical … ensure that the DPU integrates successfully into complete systems. Required Skills and Experience: Strong knowledge of, and extensive hands-on coding experience with, SystemVerilog and UVM, including the architecture, implementation and review of complex verification environments. Hands-on verification experience in standard on-chip bus protocols such as AMBA ...

chip that the whole team simulates against, a mixed‐abstraction model combining transistor‐level circuits with Verilog‐A/Verilog‐AMS and SystemVerilog real‐number behavioural blocks. These models will be derived from first‐principles mathematics and correlated against schematic and measured silicon. You will decide which blocks are represented … production Cadence flow: Virtuoso, Spectre, Xcelium and AMS Designer or similar co‐simulation environments, including parasitic extraction and post‐layout sign‐off SystemVerilog, plus MATLAB or Python/NumPy for analysis and model validation; scripting to automate model generation, checking and regression Cryogenic, space or other extreme‐environment silicon experience ...

Job Overview Arm Solution Engineering organization delivers complex solutions from systems specifications, through FE & validation, physical implementation and silicon. Join our dynamic Front End design team, a key part of Arm's SE SoC Engineering ...

Qualcomm Technologies International Ltd is seeking a verification engineer specializing in Formal Verification for ASIC design. The role involves developing FPV test plans, writing SystemVerilog Assertions, and collaborating with RTL design and DV teams to deliver signed-off results. The candidate should have 2+ years in ASIC verification, a strong ...

hardware blocks Checker creation Strong software skills Python preferred, other languages acceptable Understanding of digital hardware concepts Ability to read and debug RTL in SystemVerilog Familiarity with debugging waveforms Desirable skills and experience: Whether in UVM, SystemC or another methodology SystemVerilog Assertions (SVA) Software fluency in multiple languages Open source ...

practices, driving technical excellence and consistency across teams.**Your Profile*** BSc., or MSc., degree in Electronics or Electrical Engineering.* Strong hands-on experience with **SystemVerilog** for testbench development and verification.* Proven expertise in **UVM (Universal Verification Methodology)**, including component creation, sequences, drivers, monitors, and scoreboards.* Solid understanding and practical … Constrained Random Verification** techniques.* Experience with **Metrics‐Driven Verification**, including functional coverage and verification planning.* Ability to write **SystemVerilog Assertions (SVA)** for protocol and design checking.* Demonstrated success in achieving **Coverage Closure** across functional and code coverage metrics.* Experience analysing coverage results and refining test strategies to close gaps.* Strong ...

Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards Collaborate with software teams to define and implement configurable testbenches Work with design teams test plans … Engineering or Computer Science 6+ years and current hands-on experience in block-level/IP-level/SoC-level verification Proficiency in Verilog, SystemVerilog Deep experience with UVM-based testbenches Knowledge of Arm AMBA protocols such as AXI, APB, and AHB Understanding of Arm CHI protocol is a plus ...

knowledge of high-speed layout design and matching. Strong written, presentation, and general communication skills. Desirable Experience Experience with time-interleaved ADCs. Proficiency in SystemVerilog, real-number modelling, and Verilog-A. Experience using Cadence mixed-signal design tools. Experience mentoring junior staff. Experience working across analogue IC, digital, layout, test … will be valuable. Analogue and mixed-signal IC design and simulation tools. Cadence mixed-signal design environments where relevant. Behavioural modelling using Verilog-A, SystemVerilog, and real-number modelling where useful. Laboratory characterisation and debugging workflows for mixed-signal ICs. We Value Engineers Who Take ownership and follow through. Enjoy ...

About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and ...

Required skills and experience: Strong software skills Python preferred, other languages acceptable Understanding of digital hardware concepts Ability to read and debug RTL in SystemVerilog Familiarity with debugging waveforms Desirable skills and experience: Verification planning and execution from specification Building testbenches Functional modelling of hardware blocksChecker creation Whether … SystemC or another methodology SystemVerilog Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions #J-18808-Ljbffr ...