76 to 100 of 224 SystemVerilog Jobs in the UK

improvement What they're looking for Strong experience designing complex ASIC and/or FPGA digital systems Excellent RTL design skills using Verilog or SystemVerilog Experience optimising high-throughput digital designs for performance, timing and resource utilisation Knowledge of synthesis, timing analysis and power optimisation techniques Experience collaborating across multidisciplinary ...

large FPGAs. Expect to handle fast I/O (Ethernet, PCIe, external memory), deep pipelines, and high-density logic. The team uses Verilog/SystemVerilog, leverages Cocotb/Verilator for testing, and applies formal methods selectively. You'll collaborate closely with software and ASIC teams to extend existing platforms ...

mentoring, coaching, and feedback Skills, Knowledge and Expertise Track record of building and leading high performing collaborative teams Expert knowledge of RTL design (Verilog, SystemVerilog) for complex ASIC and FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources ...

architectures Integration of operating system-class subsystems alongside real-time domains A strong appreciation of the practical realities of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints. Familiarity with scripting languages such as Bash, Python ...

player Ability to work across teams and finding solutions to problems Ability to solve design issues through programming, e.g. Python, Tcl Strong competency in SystemVerilog or VHDL Knowledge of digital design flows Capable of managing time and priorities Desirable: Processor design Application specific blocks High-speed serial interfaces Complex third ...

diagnosis. Experience with industry-standard EDA tools such as: Siemens Tessent Synopsys TetraMAX/TestMAX Strong scripting skills in Tcl & PythonFamiliarity with Verilog/SystemVerilog and simulation environments Excellent debugging and problem-solving skillsGood communication and excellent collaboration skills. This position is based in our Edinburgh office, UK. This ...

technical mentorship and support to less experienced engineers. Required Skills and Experience5+ years of experience in IP, subsystem, or SoC verification. Strong proficiency in SystemVerilog and Verilog. Experience with UVM or other industry-standard verification methodologies. Experience developing constrained-random verification environments and reusable verification components. Experience developing verification strategies ...

like side‐channel or fault attacks. Excellent collaboration, communication, and documentation skills. Nice To Have: Familiarity with hardware design flows (e.g., RTL, UVM/SystemVerilog). Exposure to TPMs, Secure Elements, or hardware‐backed crypto modules. Background in academic research or industry work in embedded security, firmware, or cryptographic implementation. ...

development Experience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checks Experience creating design specifications Experience with Verilog/SystemVerilog and verification methodologies Strong delivery record of sophisticated RTL subsystems in reasonable timescales Ability to navigate and make high-level analysis driven PPA trade-offs ...

e.g. AMBA ACE-Lite or AXI)Familiarity with one or more of processor subsystems, NoCs, security subsystems, PCIe subsystems, system power management flowsExperience with SystemVerilog and verification methodologiesIn return -You will get to utilise your engineering skills to build support for the latest technologies and systems, impacting products in existing ...

Microprocessor architecture, Arm IP or Arm-based SoCs Optimization, large-scale data processing or performance-sensitive software Additional languages such as C++, Tcl or SystemVerilog LLM-based coding assistants such as Codex or Claude Code, including reviewing and validating AI-generated code In Return: This role offers the opportunity ...

cause analysis of issues identified throughout the verification process. Required Skills and Experience :Experience building verification environments for sophisticated RTL designs. Strong proficiency in SystemVerilog and scripting languages such as Python, Perl, or Tcl. Proven grasp of the complete verification process, starting from test planning and continuing through to verification ...

like side-channel or fault attacks. Excellent collaboration, communication, and documentation skills."Nice To Have" :Familiarity with hardware design flows (e.g., RTL, UVM/SystemVerilog).Exposure to TPMs, Secure Elements, or hardware-backed crypto modules. Background in academic research or industry work in embedded security, firmware, or cryptographic implementation. Discovering ...

improvement of RTL methodologies, automation, and development flows. Work alongside senior engineers to develop solutions to challenging customer and internal silicon problems. Technical Scope SystemVerilog RTL SoC and subsystem design CPU, GPU, AI/ML, networking, or other high-performance compute architectures Control logic and datapaths Memory interfaces and controllers ...

Job Description: Salary Range: 45k - 61kLeonardo UK operates a grade-based salary framework with broad bands. The salary range shown reflects the approved grade band for this role, or a narrower hiring range published within ...

will lead the design and verification of FPGA test benches and contribute to robust control systems for quantum hardware. You will own verification environments (SystemVerilog/UVM), drive constrained‐random testing and coverage, and help shape automated regression and CI pipelines. Hybrid work and competitive compensation are offered. #J ...

drive coverage closure across module and system levels. You will collaborate closely with RTL and hardware teams, applying advanced verification methodologies and tools (SystemVerilog, TCL, Python) to deliver robust, production-grade IP and interfaces. #J-18808-Ljbffr ...

Software Engineer to tackle challenging technical problems across a broad range of markets. You will contribute to embedded hardware, software, and system design, including SystemVerilog for FPGAs and PCB testing, while collaborating with clients across projects. Applicants should have a strong degree (or higher) in relevant fields and industrial experience ...

taking it from specification through to sign-off. You will work with architects, RTL designers and systems engineers to develop verification plans and build SystemVerilog/UVM environments. You will create coverage models, debug issues across RTL and verification environments, and contribute from early spec through final sign ...

degree in Electrical Engineering, Computer Engineering, or similar field At least ten years' of experience in analog/mixed-signal verification Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent ...

successful in this role you will also need experience of toolchains such as Vivado or Quartus and a HDL language such as VHDL or SystemVerilog, and experience in running simulations and testbenches and performing hardware-level debugging. The company are offering tailored packages for the right engineer, which includes ...

successful in this role you will also need experience of toolchains such as Vivado or Quartus and a HDL language such as VHDL or SystemVerilog, and experience in running simulations and testbenches and performing hardware-level debugging. The company are offering tailored packages for the right engineer, which includes ...

based verification at IP and subsystem levels Proven experience building UVM testbenches from scratch Proficiency in Python for verification automation Solid experience with SystemVerilog Assertions (SVA) A minimum of 4 years experience. What's on offer Competitive base salary plus share options Opportunity to help build something from the ground ...

large FPGAs. Expect to handle fast I/O (Ethernet, PCIe, external memory), deep pipelines, and high-density logic. The team uses Verilog/SystemVerilog, leverages Cocotb/Verilator for testing, and applies formal methods selectively. You'll collaborate closely with software and ASIC teams to extend existing platforms ...

Science, or a related technical field or equivalent experience 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal ...