Senior Performance Modelling Engineer (CPU group)
- Location
- Cambridge, England, United Kingdom
IPs. Develop and enhance infrastructure that employs emulators, simulators, and FPGAs to evaluate performance and power. Provide actionable insights to customers, architects, and marketing teams on how IPs perform across different scenarios and use cases. Required Skills and Experience: Strong grasp of CPU micro-architecture concepts (pipelines, caches, predictors, MMUs ...