201 to 225 of 656 SystemVerilog Jobs

systems in development today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar More ❯

systems in development today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar More ❯

systems in development today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar More ❯

mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading high performing collaborative teams. Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products. A strong skillset in delivery of digital designs for ASIC and FPGA. Optimisation of timing and hardware resources for More ❯

mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading high performing collaborative teams. Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products. A strong skillset in delivery of digital designs for ASIC and FPGA. Optimisation of timing and hardware resources for More ❯

techniques. Mentor team members regularly to foster professional growth. Skills, Knowledge & Expertise Experience building and leading high-performing teams. Expertise in RTL design (Verilog, SystemVerilog) for ASIC/FPGA products. Proficiency in digital design delivery for ASIC and FPGA. Skills in timing and hardware resource optimization, power management, synthesis, and More ❯

Solid hands-on expertise with Fusion Compiler and DFT flows. Strong understanding of scan insertion , ATPG , and test coverage optimization. Skilled in Verilog/SystemVerilog and scripting (e.g. Tcl, Python ). Proactive and independent, able to work efficiently in a multi-site team. Fluent in English, both written and spoken. More ❯

mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading high performing collaborative teams. Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products. A strong skillset in delivery of digital designs for ASIC and FPGA. Optimisation of timing and hardware resources for More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of a design block Analytical thinking, self-sufficiency and team collaboration skills Ability to work effectively across More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of multiple design blocks Analytical thinking, self-sufficiency and strong team collaboration skills Ability to work effectively More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of multiple design blocks Analytical thinking, self-sufficiency and strong team collaboration skills Ability to work effectively More ❯

MSc or PhD degree qualification in Electronics/Computer Engineering or equivalent Ability to understand and use Hardware Description Languages (HDLs) such as Verilog, SystemVerilog or VHDL Strong interest in and understanding of CPU architectures and SoC design principles Experience in using RTL simulation tools for debugging purposes Ability to More ❯

designs are developed according to relevant standards • Manage engineers • Conduct peer reviews Competences and Skills Essential • Full lifecycle of electronics design • VHDL, Verilog, or SystemVerilog • Simulators, synthesis and place & route tools and hardware debug • Verification methodologies • Scripting languages (e.g. Python) • Revision Control Systems (e.g. Git or Subversion) Flexible working You More ❯

your application stand out Strong Technical Foundations: Knowledge of SoC design, CPU architectures, and cache coherency principles! Practical Design Experience: Proficiency in HDLs (Verilog, SystemVerilog, or VHDL) and hands-on experience with RTL simulation and debug tools! Familiarity with Arm Ecosystem: Understanding of AMBA protocols, Arm Architecture, and experience communicating More ❯

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

of own work YOU SHOULD HAVE: Over 2 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

a key Defence client. Requirements Experience with Xilinx products Understanding of DSP VHDL encoding in a Linux environment Knowledge of Verilog and/or SystemVerilog Active SC clearance required Application Process Please apply online or email me directly (see below). For further information, call me. If unavailable, leave a More ❯

block functionality with top-level design goals. Experience with IP delivery, hand-off processes, and technical documentation Proficient in Verilog, VHDL, and/or SystemVerilog, with a strong understanding of synthesis, lint, CDC, and related flows. Email - Tel - LinkedIn More ❯

years of ASIC design and verification experience. Expertise in processor design, on-chip communication, high-speed interfaces, or chiplets. Proficiency in Verilog/SystemVerilog and RTL design techniques. Experience with UVM for ASIC verification. FPGA or emulation experience is a plus. This position requires working onsite 3 days per week More ❯

with 1-5 years of experience. Responsibilities Development of Wi-Fi products, including microcontrollers and connectivity. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial experience. More ❯

to patents What You Bring 8+ years in secure hardware design Master's/PhD in EE, CE, or similar Strong RTL (Verilog/SystemVerilog), ASIC flow, and scripting (Python/Perl) skills Hands-on with Synopsys/Cadence toolchains Perks Work with top-tier security experts Flexible hybrid setup More ❯

to patents What You Bring 8+ years in secure hardware design Master's/PhD in EE, CE, or similar Strong RTL (Verilog/SystemVerilog), ASIC flow, and scripting (Python/Perl) skills Hands-on with Synopsys/Cadence toolchains Perks Work with top-tier security experts Flexible hybrid setup More ❯

candidate will have: 6 years' experience+ working with FPGAs (some experience within a financial/trading setting is a must). Extensive experience with SystemVerilog or a similar hardware description language. Ability to create testbenches to validate HDL code through simulation with ModelSim experience a plus. Strong grasp of computer More ❯

to offer improvements to efficiency and quality for both the design flow and the final product. Required skills: Knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources More ❯