26 to 50 of 70 SystemVerilog Jobs

full design lifecycle, and collaborate with world-class architects to deliver high-performance, power-efficient processor IP. You will apply strong Verilog/SystemVerilog/VHDL skills, software background (C/C++/Python), and DSL experience to drive verification and robust design practices in a cutting-edge environment. #J ...

degree in Electrical Engineering, Computer Engineering, or similar field At least ten years’ of experience in analog/mixed-signal verification Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium) A solid understanding of mixed-signal designs Experience with scripting languages (Python, Perl, Tcl) for automation Excellent ...

adjust designs to ensure timing closure - Bring value with experience in Python based verification frameworks, such as cocotb (highly advantageous) Requirements: - Strong knowledge of SystemVerilog - Experience with Python - Proven background in RTL verification - Ability to write and validate timing constraints - Understanding of low power design principles - Experience writing module specifications ...

cross‐functional hardware teams Debug challenging issues spanning RTL, simulation, and hardware platforms What they’re looking for Strong hands‐on expertise in SystemVerilog and UVM Proven debugging skills across RTL, simulation, and hardware Experience owning verification planning and strategy in commercial environments Comfortable operating in fast‐moving environments with ...

mentoring, coaching, and feedback Skills, Knowledge and Expertise Track record of building and leading high performing collaborative teams Expert knowledge of RTL design (Verilog, SystemVerilog) for complex ASIC and FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources ...

architectures Integration of operating system-class subsystems alongside real-time domains A strong appreciation of the practical realities of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints Familiarity with scripting languages such as Bash, Python ...

verification plans and develop automated test benches Create, document, and verify behavioral models of analog and analog-mixed-signal blocks (e.g., VerilogA/AMS, SystemVerilog-RNM, Wreal) to ensure they are optimized and up-to-date Design and verify Analog/RF blocks and sub-blocks (e.g., Transmitter ...

collaborate with design teams to define verification plans and build test benches from scratch or with reusable verification components. The role requires experience with SystemVerilog, UVM, and embedded C for Cortex-M class MCUs, and familiarity with PCIe/HDMI/USB/AMBA protocols. On-site work in Cambridge ...

leading processor designs and collaborating with top architects and engineers. The role requires 6+ years in RTL design and strong skills in Verilog/SystemVerilog/VHDL, with exposure to verification methods like UVM. #J-18808-Ljbffr ...

space and high reliability, and drive architecture and design across Microchip FPGAs for space missions. The role requires deep FPGA expertise, VHDL and SystemVerilog proficiency, and experience with industry tools; leadership on complex projects is preferred. Hybrid work options apply in the UK. #J-18808-Ljbffr ...

required Skills Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline 4+ years’ experience in the microelectronics/EDA industry Proficiency in SystemVerilog and assertions Hands‐on experience with metric‐driven verification Strong knowledge of constrained‐random verification techniques (e.g. UVM) Experience with formal verification Proficiency in scripting ...

design principles, with experience in sign‐off for multi‐clock, low‐power designs, including design‐for‐debug and DFT. Strong experience in Verilog/SystemVerilog (essential). Knowledge of digital verification methodologies, with the ability to review, challenge, and guide verification strategies in collaboration with verification teams. Working knowledge ...

development for large scale, high performance silicon projects. Proven success leading and developing technical teams in a semiconductor environment. Deep expertise in SystemVerilog or VHDL and familiarity with modern digital design flows. Strong ability to diagnose and resolve complex design issues, including via scripting/programming (Python, Tcl, etc.). ...

Job Description At Leonardo, we are excited to be recruiting for a skilled FPGA Engineer to work within a multi-disciplinary team for our Precision Guidance area. In this broad FPGA firmware engineering role, you ...

drive development across units, lead architectural investigations, and collaborate with verification, software, and imaging researchers to deliver robust hardware solutions. Ideal candidates have strong SystemVerilog/Verilog/VHDL skills, UNIX scripting experience, and prior leadership capabilities for senior roles. #J-18808-Ljbffr ...

drive development across units, lead architectural investigations, and collaborate with verification, software, and imaging researchers to deliver robust hardware solutions. Ideal candidates have strong SystemVerilog/Verilog/VHDL skills, UNIX scripting experience, and prior leadership capabilities for senior roles. #J-18808-Ljbffr ...

algorithm modelling to RTL sign-off and silicon bring-up. You will collaborate with digital design, optics, and software teams, develop verification environments with SystemVerilog/UVM, constrained-random testing, and formal methods, and contribute to reusable verification methodologies while mentoring junior engineers. #J-18808-Ljbffr ...

remote and occasional onsite support to VIP users in Arm offices across the world as and when required Required Skills & Experience: Experience of using SystemVerilog and UVM with sound understanding of object-oriented design, data structures and algorithms Experience of IP and SoC verification with deep knowledge of verification processes ...

validate new features and enable cutting edge methodologies for HW/SW co-verification. Minimum Qualifications General RTL verification skills Knowledge of SystemVerilog RTL design/Test Bench Ability to debug design issues from waveforms Programming skills with Python, C, C++ Understanding of emulation build, run and debug flows Knowledge ...

stack is, in fact, in Java). However, once you are here, you will be exposed to a diverse tech stack including Python, TypeScript, SystemVerilog (for FPGAs), Raft, Kubernetes, DLT, Angular, and more. The Package Potential: A clear path to a permanent role after graduation. Compensation for permanent roles currently ...

compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus … consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability ...

Join us at Entrust. From our comprehensive portfolio of solutions to our flexible, global workplace, we empower careers, foster collaboration, and build solutions that help keep the world moving safely. Position Overview Provides technical leadership ...

Working for a leader in the Semi's industry, I am looking to recruit a high-level, Senior SOC Architect. This position can be based in Edinburgh or Cork. You will be tasked with the ...

GSPS input rates, continuous streaming data paths, deep pipelining, and robust hand-shaking in advanced CMOS nodes Develop and maintain comprehensive verification environments using SystemVerilog/UVM, including constrained-random testing, coverage closure, and regression automation Define and implement assertion-based verification strategies for control logic, data-path correctness … performance ASICs or SoCs Ownership of verification for at least one complex block or subsystem processing continuous real-time data streams Strong proficiency in SystemVerilog, assertions (SVA), and modern verification methodologies (e.g. UVM. CocoTB) Proven experience verifying designs operating in GHz-class clock domains, including CDC/RDC analysis Familiarity ...

latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into RTL micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power … integration teams Contributing to continuous improvement of engineering processes and design methodologies Skills & Experience Strong RTL design experience using Verilog and/or SystemVerilog Proven background developing complex FPGA and ASIC designs Experience optimising digital hardware for high-throughput signal or data processing Knowledge of synthesis, timing analysis, and power ...