26 to 50 of 402 SystemVerilog Jobs

s or Master's degree in Electrical Engineering, Computer Engineering, or related field. - Minimum of 5 years of experience in ASIC verification. - Proficiency in SystemVerilog, Verilog and UVM methodology. - Strong understanding of digital design concepts and verification techniques. - Excellent problem-solving skills and attention to detail. - Ability to work effectively More ❯

simulation models to verify logic designs. Experience defining feature requirements in collaboration with software teams. Familiar with common clock domain crossing methods. Preferred: Experience SystemVerilog to implement synthesizable logic targeting FPGAs. Experience writing RTL for ASIC projects. Experience with gate-level simulation and debug. Experience bringing up prototype hardware. Experience More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working More ❯

role may involve technical reviews across the UK or abroad. What we need from you: Experience with design tools such as Xilinx, TCL, Verilog, SystemVerilog, and UVM Knowledge of FPGA architectures like Xilinx 7, UltraScale, Intel (Altera), or Microsemi (Actel) Experience with high-speed interfaces such as PCIe, Ethernet, JESD More ❯

Project Management on activities, plans, and schedules. Required Skills and Experience Experience of RTL design for complex SoC development using Verilog and/or SystemVerilog Experience in the following areas Static design checks, Synthesis and timing analysis, Power management techniques, Power and Clock domain crossing Exposure to all stages of More ❯

Ideal candidates are hobbyists or early-career engineers passionate about programmable logic and embedded design. Responsibilities include: Designing FPGA systems using VHDL, Verilog, or SystemVerilog Working with Zynq Ultrascale+ SoCs, DDR memory, AXI bus architecture, and Ethernet interfaces Integrating ARM processors and developing high-speed interfaces Creating testbenches and verification More ❯

tier university in Engineering, Computer Science, Maths, or related field Must have 3+ years' experience in RTL design and verification for FPGAs using Verilog, SystemVerilog or VHDL Experience in FPGA toolchains using Xilinx Vivado or Intel Quartus Experience of using Python within verification frameworks Experience of simulation environments, Modelsim/ More ❯

of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. More ❯

of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. More ❯

of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. More ❯

of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. More ❯

design methodologies used by the team. Required Skills and Experience: Experience of RTL design for complex ASIC products & SoCs using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Knowledge or experience with Functional Safety concepts and standards (e.g., ISO 26262, IEC More ❯

processor-based system designs Experience verifying subsystems for PCIe, DDR, UCIe, Ethernet Knowledge of C/C++ and/or hardware verification languages e.g. (SystemVerilog, SystemC), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies - UVM/OVM, formal, emulation Exposure More ❯

processor-based system designs Experience verifying subsystems for PCIe, DDR, UCIe, Ethernet Knowledge of C/C++ and/or hardware verification languages e.g. (SystemVerilog, SystemC), shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies - UVM, formal, emulation Exposure to all More ❯

of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. More ❯

to hear from you! 🔧 Responsibilities Develop and test FPGA-based systems using Xilinx Zynq/Zynq Ultrascale+ SoCs Design RTL using VHDL, Verilog , or SystemVerilog Integrate ARM cores , AXI bus , DDR , and high-speed interfaces like JESD and Ethernet Create testbenches , run regression tests , and assist in system-level debug More ❯

Instruments LabVIEW-based equipment. Performing hands-on testing of devices using National Instruments LabVIEW-based equipment in the Plymouth lab facility. Designing and verifying SystemVerilog RTL targeting FPGA implementations. Creating schematics for test boards and fixtures. Recording and analyzing product test results and equipment logs. The Impact You Will Have More ❯

Instruments LabVIEW-based equipment. Performing hands-on testing of devices using National Instruments LabVIEW-based equipment in the Plymouth lab facility. Designing and verifying SystemVerilog RTL targeting FPGA implementations. Creating schematics for test boards and fixtures. Recording and analyzing product test results and equipment logs. The Impact You Will Have More ❯

to hear from you! ? Responsibilities Develop and test FPGA-based systems using Xilinx Zynq/Zynq Ultrascale+ SoCs Design RTL using VHDL, Verilog , or SystemVerilog Integrate ARM cores , AXI bus , DDR , and high-speed interfaces like JESD and Ethernet Create testbenches , run regression tests , and assist in system-level debug More ❯

might also have experience of one or more of the following: Build systems (e.g. Bazel, Nextflow, FuseSoC) Hardware EDA tools (eg. simulation, linting, synthesis) Systemverilog, C/C++, Simulator DPI/VPI Containerization (eg. Docker) Distributed Compute, Orchestration Jenkins Automation Software templating, rendering Data Engineering/Data Science/Machine More ❯