FPGA Engineer Location: Centerville, UT Type: On-site Compensation: $180K - $200K Reports to: Chief Operating Officer Company Overview: We are at the forefront of safeguarding digital landscapes and your expertise contributes directly to securing the digital world. As a leader More ❯
Luton, Bedfordshire, United Kingdom Hybrid / WFH Options
Experis - ManpowerGroup
Job Title: Firmware/FPGA Engineer Location: Multiple locations across the UK (Bristol, London, Essex) Contract Type: Inside IR35 About Us: We are a leading services company specializing in Defence systems. Our team is dedicated to designing, developing, and delivering More ❯
Job Description As a Digital Design Engineer, you will be responsible for the digital design and RTL coding using Verilog or System Verilog. Integrating modules at SoC and work hands-on in the development cycle, especially in frontend domain until More ❯
FPGA Engineers - SC Clerarable Firmware/FPGA Engineers - Luton - Bristol or Basildon 4 days on site hybrid These are ongoing contract positions, 12 months initially (Inside of IR35). Duties: Designing, developing, and delivering firmware solutions. Responsibilities will include: Concept More ❯
We are seeking a Senior Analog/Mixed Signal ASIC Design Engineer to join our team in the Silicon Architecture group. Members of our group lead the design of integrated circuits from conceptual phases through detailed design, implementation, verification, test More ❯
will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target … forefront of silicon quality. Skills & Experience 7 + years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low More ❯
will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target … forefront of silicon quality. Skills & Experience 7 + years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low More ❯
will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target … forefront of silicon quality. Skills & Experience 7 + years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low More ❯
FPGA Engineer - London or Amsterdam - Leading High Frequency Trading Firm Summary This is a fantastic opportunity to work at a tech-focused market maker with groundbreaking success in high frequency trading. The company culture is competitive yet collaborative, leveraging advanced More ❯
About Graphcore How often do you get the chance to build a technology that transforms the future of humanity? Graphcore products have set the standard in made-for-AI compute hardware and software, gaining global attention and industry acclaim. Now More ❯
Job Description At Ouster, we build sensors and tools for engineers, roboticists, and researchers, enabling them to make the world safer and more efficient. We have transformed LIDAR technology from an analog device with thousands of components into an elegant More ❯
Working for a global semiconductor company - a key player high-speed digital IP development; I have a new job available as ASIC Design Support Engineer. You will be a key member of a support and automation function, working with R More ❯
Engineering, Computer Engineering, or related field; 3+ years of hands-on experience in FPGA design and verification, with a specific emphasis on UVM and SystemVerilog; In-depth knowledge and proficiency in UVM methodology for verification purposes; Strong skills in SystemVerilog for developing and maintaining test benches; Proven ability to troubleshoot More ❯
Engineering, Computer Engineering, or related field; 3+ years of hands-on experience in FPGA design and verification, with a specific emphasis on UVM and SystemVerilog; In-depth knowledge and proficiency in UVM methodology for verification purposes; Strong skills in SystemVerilog for developing and maintaining test benches; Proven ability to troubleshoot More ❯
What You’ll Do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs … commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already More ❯
IP for SoC Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications Implement complex digital blocks in SystemVerilog Create timing constraints and power intent files; perform linting , CDC, RDC and DFT checks to ensure high quality designs Run synthesis and power estimation to … principles , including timing closure and power optimization Extensive experience in linting, CDC, RDC, DFT, logic synthesis and power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on More ❯
IP for SoC Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications Implement complex digital blocks in SystemVerilog Create timing constraints and power intent files; perform linting , CDC, RDC and DFT checks to ensure high quality designs Run synthesis and power estimation to … principles , including timing closure and power optimization Extensive experience in linting, CDC, RDC, DFT, logic synthesis and power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on More ❯
IP for SoC Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications Implement complex digital blocks in SystemVerilog Create timing constraints and power intent files; perform linting , CDC, RDC and DFT checks to ensure high quality designs Run synthesis and power estimation to … principles , including timing closure and power optimization Extensive experience in linting, CDC, RDC, DFT, logic synthesis and power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on More ❯
IP for SoC Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications Implement complex digital blocks in SystemVerilog Create timing constraints and power intent files; perform linting , CDC, RDC and DFT checks to ensure high quality designs Run synthesis and power estimation to … principles , including timing closure and power optimization Extensive experience in linting, CDC, RDC, DFT, logic synthesis and power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on More ❯
IP for SoC Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications Implement complex digital blocks in SystemVerilog Create timing constraints and power intent files; perform linting , CDC, RDC and DFT checks to ensure high quality designs Run synthesis and power estimation to … principles , including timing closure and power optimization Extensive experience in linting, CDC, RDC, DFT, logic synthesis and power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on More ❯
Brand new, and cutting edge project, working for an exciting scale-up in the semiconductor space - to be based full-time from Scotland. Salary is circa £100k (PLUS AMAZING ADDITIONAL PACKAGE) I am looking for a SOC/chip design More ❯
Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Where you will be working Cambridge, located in the East of England, 50 miles north of London, is a unique and beautiful city, renowned for More ❯
Social network you want to login/join with: Design Verification Engineer, Newport, Wales Client: IC Resources Location: Newport, Wales, United Kingdom Job Category: Other EU work permit required: Yes Job Views: 1 Posted: 31.05.2025 Expiry Date: 15.07.2025 Job Description More ❯
Portsmouth, England, United Kingdom Hybrid / WFH Options
Enterprise Recruitment Ltd
2 days ago Be among the first 25 applicants Direct message the job poster from Enterprise Recruitment Ltd BSc Computer Science. 25 years tech recruitment experience 01442 200411 This position is perfect for an FPGA Engineer focused on innovation. You More ❯
