176 to 200 of 257 SystemVerilog Jobs

microarchitecture, performance modeling, RTL design, or design verification. You can work across the adjacent parts of architecture, RTL, verification, and software. You can write SystemVerilog and use Python or C++ for modeling, automation, and verification. You understand pipelines, memory systems, interconnects, and ASIC design flows. You can turn incomplete workload ...

experience levels. Required Skills and Experience: Significant experience in IP/SoC verification with deep knowledge of verification methodologies and processes Deep expertise in SystemVerilog and UVM based test bench or verification IP development Strong understanding of functional verification methodologies, including constrained-random verification, coverage-driven verification, formal verification ...

Are you ready to shape the future of cutting-edge technology? Leonardo, a global leader in advanced electronics, is seeking Firmware/FPGA Engineers at various levels to join our innovative teams across the UK. ...

Job Description:Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61,950/Principal: £53,300 to £71,400/Lead: £59,400 to £84,955Leonardo UK operates a grade-based ...

## Firmware/FPGA Engineers - all levelsApplylocations: GB - Edinburgh: GB - Newcastletime type: Full timeposted on: Posted Todayjob requisition id: R0030762**Job Description:**Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61 ...

author design intent documents (SDC/UPF) while collaborating with verification and implementation teams to ensure timely delivery. Ideal candidates will have strong SystemVerilog skills, experience with complex SoC architectures, and familiarity with UNIX scripting to support automation #J-18808-Ljbffr ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

Design Engineer job in Southampton: Define and optimise capacitive sensing architectures and acquisition strategies Develop and verify RTL designs using Verilog and/or SystemVerilog Develop embedded software for sensing and signal-processing applications Lead silicon bring-up, debugging and validation activities Solve complex technical challenges across analogue, digital … Physics or a related discipline Experience in digital or mixed-signal IC design and development Strong RTL design experience using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Good understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling ...

validation, and product release. Key Responsibilities: System Architecture: Lead FPGA subsystem architecture for complex data platforms. RTL & Verification: Design/verify digital RTL (SystemVerilog/Verilog) using AMD/Xilinx toolchains. Optimization: Maximize throughput, power efficiency, resource usage, and timing closure. Integration: Collaborate with ASIC, FW, and SW teams … automation and mentor mid/senior hardware engineers. What We Need: Proven full-lifecycle FPGA design experience (architecture to hardware bring-up). Strong SystemVerilog/Verilog skills with AMD/Xilinx toolchains (Vivado/Questa). Hands-on experience with high-speed interfaces (PCIe/DMA) and lab debugging ...

trade risk checks and order management. You could go deep into hardware-software co-design on one project, then shift to building and verifying SystemVerilog modules with Python-based cocotb testbenches on the next! A Day at Arctic Lake We are big believers in the power of being … FPGA design Writing RTL code for order routing and risk checks Working with a diverse tech stack to build low-latency systems (e.g., SystemVerilog, Java, C, Python, etc.) Collaborating with software engineers to integrate FPGA systems into Arctic Lake’s wider trading infrastructure Supporting ongoing research and development projects aimed ...

Doing Define and optimise capacitive sensing architectures and acquisition strategies Work with the design team to define and verify RTL using Verilog/SystemVerilog Develop high-performance embedded software for sensing and signal-processing functions Drive silicon bring-up, debugging and validation activities Solve complex system-level challenges across analog … related discipline 5+ years’ experience in digital or mixed-signal IC design and development Strong RTL design skills using Verilog and/or SystemVerilog Embedded software development experience in C/C++ Solid understanding of microcontroller architectures and embedded systems Experience using Python, MATLAB or similar tools for modelling, automation ...

Are you seeking answers and opportunities for your future? At our site in Amerang you will find both as R&D Senior Digital Design Engineer (m/f/d) Advantest Europe GmbH Amerang Vollzeit ...

Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering (EE), VLSI Design, or a closely related fieldLanguages: Proficiency in Verilog, SystemVerilog, and core concepts of UVM.Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.EDA Tools: Familiarity with … based testbench development 1.Experience in ASIC/SoC Testbench definition 2.Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and the Universal Verification Methodology (UVM)." SV functional coverage, Assertions coding 1.Expertise & hands-on experience in OVM/UVM methodologies using SV 2.Experience to Write ...

ASIC/SoC verification till tapeout stage UVM based testbench development 2.Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and the Universal Verification Methodology (UVM)." SV functional coverage, Assertions coding 1.Expertise & hands-on experience in OVM/UVM methodologies using SV 2.Experience … degree in Electronics & Communication Engineering (ECE), Electrical Engineering (EE), VLSI Design, or a closely related field Core Technical Skills Languages: Proficiency in Verilog, SystemVerilog, and core concepts of UVM. Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts. EDA Tools: Familiarity ...

doing Designing and developing advanced mixed-signal and embedded solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded software in C/C++ for sensing, control and signal processing applications Supporting silicon bring-up, debugging and validation activities Working across hardware, firmware and system … Contributing to technology and product roadmaps What we're looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software development experience using C/C++ Good understanding of microcontrollers and embedded systems Experience with Python, MATLAB or similar engineering tools Strong ...

doing Designing and developing advanced mixed-signal and embedded solutions Defining digital architectures and contributing to RTL development using Verilog/SystemVerilog Developing embedded software in C/C++ for sensing, control and signal processing applications Supporting silicon bring-up, debugging and validation activities Working across hardware, firmware and system … Contributing to technology and product roadmaps What we're looking for Experience developing digital or mixed-signal integrated circuits Strong Verilog and/or SystemVerilog skills Embedded software development experience using C/C++ Good understanding of microcontrollers and embedded systems Experience with Python, MATLAB or similar engineering tools xehkeey ...

quality requirements prior to FPGA deployment and ASIC tape-out. Key Responsibilities Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. Execute directed and constrained-random verification. Analyse coverage and debug RTL and verification issues. Support … Degree in Electronic Engineering, Computer Engineering or a related discipline. At least 3 years experience verifying digital ASIC and/or FPGA designs. Strong SystemVerilog and UVM skills. Understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency and scripting skills (Python ...

quality requirements prior to FPGA deployment and ASIC tape-out. Key Responsibilities Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. Execute directed and constrained-random verification. Analyse coverage and debug RTL and verification issues. Support … Degree in Electronic Engineering, Computer Engineering or a related discipline. At least 3 years experience verifying digital ASIC and/or FPGA designs. Strong SystemVerilog and UVM skills. Understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency and scripting skills (Python ...

cleanly into end-to-end robotics solutions. Key Responsibilities FPGA IP Design & Architecture Design, implement, and optimize high-performance soft IP in Verilog/SystemVerilog for robotics and industrial solutions Define and maintain low-level HAL/driver APIs that expose IP capabilities to embedded and host software Develop … Electrical/Electronic Engineering (EEE), Computer Engineering, Computer Science, or a related discipline Strong production experience in RTL design (Verilog and/or SystemVerilog) targeting FPGAs Hands-on experience with RTL verification and simulation (e.g. ModelSim/Questa, VCS, or equivalent) Proven ability to close timing and optimize resource utilization ...

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into ...

engineering team, contributing to the core FPGA technology that powers a range of next-generation products. Responsibilities Design and develop reusable FPGA modules using SystemVerilog for deployment across multiple products. Perform RTL verification and support timing closure through constraints, analysis, and design optimisation. Write module specifications, review code and documentation … maintain high engineering standards. Collaborate with hardware, software, and mechanical engineers to deliver new products to market. Essential Experience Strong SystemVerilog FPGA design experience. RTL verification skills and familiarity with Python. Experience writing timing constraints and achieving timing closure. Desirable Experience Experience with cocotb for FPGA verification. Familiarity with Linux ...