Supportpre‐sales activities: demos, technical evaluations, benchmarks, methodology guidance Improve customer verification flows and testbench architectures Debug RTL/gate‐level simulation issues and SystemVerilog/UVM environments Analyse functional and code coverage Develop and debug SystemVerilog assertions Collaborate with Sales to grow adoption and identify new opportunities … technical voice of the customer to R&D What You’ll Need: Typically requires 8–13 yearsof relevant experience Strong knowledge ofVerilog/SystemVerilog, UVM, coverage, and assertions Experience in customer interaction, pre‐sales, or technical support is a plus Strong problem‐solving and communication skills Bachelor’s degree inComputer ...